MRISC32 is an open source project. If you wish to get involved, have a look below for things that we would like to get help with.
If you feel that you want to help out, contact the MRISC32 author at GitHub: mbitsnbites.
The MRISC32 GNU toolchain is still under development, and could use some more work. Both to improve the quality, and to add new features, such as vector support (through intrinsics and/or autovectorization).
Another thing that needs to be implemented is relocation relaxation in binutils (the MRISC32 addressing modes are particularly well suited for relaxation).
An MRISC32 back end for LLVM would also be very useful.
During the development of MRISC32-A1, the main target device has been an Intel Cyclone V FPGA. The VHDL source code is written in a portable way, so it should synthesize against any target device - in theory.
It would be good to get some help with testing the design on more devices (e.g. Xilinx, Lattice and Microsemi devices). Just running the code through synthesis, fitting and timing would give a good indication about the level of device support.
It would also be interesting to know how the design performs (e.g. what FMAX to expect) on high end devices (e.g. Intel Stratix and Xilinx Virtex), for which there is no support from free software tools.